The present invention is an improved circuit for providing synchronization for microcontroller branch input condition signals and for providing asynchronous clearing.
In a microcontroller application, branch input condition signals are latched and synchronized by synchronizer circuits which also respond to a reset condition (clearing signal) in a microcode sequence but, which because of the circuits delay in responding to the reset condition makes certain microcode sequences unusable. These synchronizers impose undesirable microcoding constraints due to the fact that the turn off condition, triggered by the reset condition, is also synchronized and upon receipt of the reset condition it takes an additional two clock cycles before the output makes a transition.
The present invention solves this problem by providing synchronization for the front edge of the input signal while permitting an asynchronous resetting on the back edge of the input signal. Resetting can occur one clock cycle earlier so that, for example, the next loop instruction in a microcode sequence of the type calling for a Loop 1, RESET and Loop 2 is executed within one clock cycle after receiving the reset condition.